m physical modeling / IICSM

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Computer chip design models

Connect logic, timing, power, interconnect, floorplanning, and yield through twenty worked implementation estimates.

Subject library · 51 guides · derivations & worked examples

Matter pathway: atom → solid → liquid → gas → plasma. Quantum mechanics and quantum field theory provide foundations across the pathway; they are not additional phases. This is a connected modeling route, not a universal heating curve. Actual phases depend on pressure, composition, and kinetics.

1. From logic to implementation

Definitions & inputs. RTL describes behavior; gates implement Boolean functions; N denotes counts, not physical transistor area.

  1. Boolean logic establishes functionality before physical implementation.

    Y=AB‾(NAND)Y=\overline{AB}\quad(\mathrm{NAND})
  2. n binary storage bits represent this many bit patterns.

    Nstates=2nN_{\rm states}=2^n
  3. Each stage refines timing, physical connectivity, and manufacturing constraints.

    RTL→synthesis→floorplan→place→route→signoff\text{RTL}\to\text{synthesis}\to\text{floorplan}\to\text{place}\to\text{route}\to\text{signoff}

Interpretation. Correct logic alone does not guarantee a manufacturable or timing-clean chip.

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2. Setup, hold, and path delay

Definitions & inputs. tcq clock-to-Q delay, tcomb combinational path delay, tsetup setup time, u clock uncertainty.

  1. Latest data arrival must precede the next capture edge by setup time.

    Tclk≥tcq,max⁡+tcomb,max⁡+tsetup+uT_{clk}\geq t_{cq,\max}+t_{comb,\max}+t_{setup}+u
  2. Positive slack means this modeled path meets setup.

    slacksetup=Tclk−(tcq+tcomb+tsetup+u)\mathrm{slack}_{setup}=T_{clk}-(t_{cq}+t_{comb}+t_{setup}+u)
  3. Earliest data must not disturb the capture register’s hold window.

    tcq,min⁡+tcomb,min⁡≥thold+uholdt_{cq,\min}+t_{comb,\min}\geq t_{hold}+u_{hold}

Interpretation. Increasing the clock period does not directly fix a hold violation.

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3. Switching energy and interconnect

Definitions & inputs. α is expected 0→1 transitions per clock, C switched capacitance, V supply, f frequency, Ileak leakage current.

  1. Each complete charge event draws CV² from the supply; half is stored and later dissipated.

    Esupply,charge=CV2,Pdyn=αCV2fE_{\rm supply,charge}=CV^2,\quad P_{dyn}=\alpha CV^2f
  2. Leakage and first-order wire/load delay use different models.

    Pleak=VIleak,tRC≃0.69RCP_{leak}=VI_{leak},\quad t_{RC}\simeq0.69RC
  3. Geometry and current set resistive voltage loss.

    Rwire=ρℓ/A,ΔV=IRR_{wire}=\rho\ell/A,\quad\Delta V=IR

Interpretation. Parasitic extraction and activity characterization replace these estimates in signoff.

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4. Area, thermal budgets, and manufacturing yield

Definitions & inputs. Acell is total cell area, U utilization, D0 defect density, θJA package thermal resistance.

  1. Reserve space for routing and physical optimization.

    Acore≃Acell/UA_{core}\simeq A_{cell}/U
  2. A Poisson no-defect probability estimates yield for random area defects.

    Y=e−D0A,Ngood=YNgrossY=e^{-D_0A},\quad N_{good}=YN_{gross}
  3. Steady thermal resistance maps power to a junction temperature estimate.

    Tj≃Ta+θJAPT_j\simeq T_a+\theta_{JA}P

Interpretation. Utilization, yield, and thermal margin are separate constraints; none replaces full design-rule and reliability checks.

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Graphical worked example

P=αCV²f with α=0.2, C=10 pF, f=1 GHz; no leakage term. X axis: Supply voltage (V). Y axis: Dynamic switching power (mW).
P=αCV²f with α=0.2, C=10 pF, f=1 GHz; no leakage term. Related worked calculation · Download SVG · Plot data

Twenty worked examples

Open a problem to see its defined inputs, assumptions, equation, numerical substitution, result, and interpretation. Values are illustrative analytical exercises.

Example 01. Register state count

Definitions & inputs. n=8 bits.

  1. Choose the governing model and isolate the requested quantity.

    N=2nN=2^n
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    N=28N=2^8
  3. Evaluate the expression; the result uses the units shown.

    Result=256 \mathrm{Result}=256\

Interpretation. This is representable states, not clock cycles.

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Example 02. Memory bit count

Definitions & inputs. 1024 words, 32 bits per word.

  1. Choose the governing model and isolate the requested quantity.

    Nb=NwWN_b=N_wW
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Nb=1024(32)N_b=1024(32)
  3. Evaluate the expression; the result uses the units shown.

    Result=32768 bits\mathrm{Result}=32768\ {\rm bits}

Interpretation. The raw payload is 4 KiB before ECC and addressing overhead.

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Example 03. Setup-limited period

Definitions & inputs. tcq=80 ps, combinational delay 600 ps, setup 70 ps, uncertainty 50 ps.

  1. Choose the governing model and isolate the requested quantity.

    Tmin=tcq+tcomb+tsetup+uT_{min}=t_{cq}+t_{comb}+t_{setup}+u
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Tmin=80+600+70+50T_{min}=80+600+70+50
  3. Evaluate the expression; the result uses the units shown.

    Result=800 ps\mathrm{Result}=800\ {\rm ps}

Interpretation. Corresponding ideal maximum clock is 1.25 GHz for this path.

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Example 04. Maximum frequency

Definitions & inputs. Tmin=800 ps.

  1. Choose the governing model and isolate the requested quantity.

    fmax=1/Tminf_{max}=1/T_{min}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    fmax=1/(800×10−12)f_{max}=1/(800\times10^{-12})
  3. Evaluate the expression; the result uses the units shown.

    Result=1.25×109 Hz\mathrm{Result}=1.25\times10^{9}\ {\rm Hz}

Interpretation. Other paths or corners can lower the design limit.

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Example 05. Setup slack

Definitions & inputs. Clock period 1000 ps, modeled required path budget 800 ps.

  1. Choose the governing model and isolate the requested quantity.

    s=Tclk−tpaths=T_{clk}-t_{path}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    s=1000−800s=1000-800
  3. Evaluate the expression; the result uses the units shown.

    Result=200 ps\mathrm{Result}=200\ {\rm ps}

Interpretation. Positive slack is remaining setup margin.

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Example 06. Hold slack

Definitions & inputs. tcq,min=30 ps, tcomb,min=20 ps, thold=40 ps, uncertainty=5 ps.

  1. Choose the governing model and isolate the requested quantity.

    sh=tcq,min+tcomb,min−thold−uhs_h=t_{cq,min}+t_{comb,min}-t_{hold}-u_h
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    sh=30+20−40−5s_h=30+20-40-5
  3. Evaluate the expression; the result uses the units shown.

    Result=5 ps\mathrm{Result}=5\ {\rm ps}

Interpretation. Only five picoseconds of hold margin remain.

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Example 07. Dynamic power

Definitions & inputs. α=0.2, C=10 pF, V=1 V, f=1 GHz.

  1. Choose the governing model and isolate the requested quantity.

    P=αCV2fP=\alpha CV^2f
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    P=0.2(10−11)(1)2(109)P=0.2(10^{-11})(1)^2(10^9)
  3. Evaluate the expression; the result uses the units shown.

    Result=0.002 W\mathrm{Result}=0.002\ {\rm W}

Interpretation. Activity counts 0→1 charge events per clock.

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Example 08. Voltage-scaling power ratio

Definitions & inputs. Supply changes 1.0 V to 0.8 V, other factors fixed.

  1. Choose the governing model and isolate the requested quantity.

    P2/P1=(V2/V1)2P_2/P_1=(V_2/V_1)^2
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    (0.8/1)2(0.8/1)^2
  3. Evaluate the expression; the result uses the units shown.

    Result=0.64 \mathrm{Result}=0.64\

Interpretation. This alone predicts 36% less dynamic power; timing may worsen.

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Example 09. Leakage power

Definitions & inputs. V=0.8 V, aggregate leakage 2 mA.

  1. Choose the governing model and isolate the requested quantity.

    P=VIP=VI
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    P=0.8(0.002)P=0.8(0.002)
  3. Evaluate the expression; the result uses the units shown.

    Result=0.0016 W\mathrm{Result}=0.0016\ {\rm W}

Interpretation. Leakage can vary strongly with temperature and process.

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Example 10. Charge-event energy

Definitions & inputs. C=20 fF, V=0.8 V.

  1. Choose the governing model and isolate the requested quantity.

    E=CV2E=CV^2
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    E=(20×10−15)(0.8)2E=(20\times10^{-15})(0.8)^2
  3. Evaluate the expression; the result uses the units shown.

    Result=1.28×10−14 J\mathrm{Result}=1.28\times10^{-14}\ {\rm J}

Interpretation. This is supply energy for charging, not the stored half-CV² energy.

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Example 11. Lumped interconnect delay

Definitions & inputs. R=1 kΩ, C=20 fF.

  1. Choose the governing model and isolate the requested quantity.

    td≃0.69RCt_d\simeq0.69RC
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    td=0.69(1000)(20×10−15)t_d=0.69(1000)(20\times10^{-15})
  3. Evaluate the expression; the result uses the units shown.

    Result=1.38×10−11 s\mathrm{Result}=1.38\times10^{-11}\ {\rm s}

Interpretation. This is the 50% delay of a single-pole step approximation.

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Example 12. Wire resistance

Definitions & inputs. ρ=2×10⁻⁸ Ωm, length 1 mm, cross section 1 µm².

  1. Choose the governing model and isolate the requested quantity.

    R=ρℓ/AR=\rho\ell/A
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    R=(2×10−8)(10−3)/10−12R=(2\times10^{-8})(10^{-3})/10^{-12}
  3. Evaluate the expression; the result uses the units shown.

    Result=20 Ω\mathrm{Result}=20\ \Omega

Interpretation. Narrower or longer wires raise resistance.

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Example 13. Supply IR drop

Definitions & inputs. Rail current 20 mA, effective path resistance 0.5 Ω.

  1. Choose the governing model and isolate the requested quantity.

    ΔV=IR\Delta V=IR
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    ΔV=0.020(0.5)\Delta V=0.020(0.5)
  3. Evaluate the expression; the result uses the units shown.

    Result=0.01 V\mathrm{Result}=0.01\ {\rm V}

Interpretation. Ten millivolts is a DC estimate; switching adds transient effects.

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Example 14. Core area from utilization

Definitions & inputs. Cell area 2 mm², target utilization U=0.6.

  1. Choose the governing model and isolate the requested quantity.

    Acore=Acell/UA_{core}=A_{cell}/U
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Acore=2/0.6A_{core}=2/0.6
  3. Evaluate the expression; the result uses the units shown.

    Result=3.333333 mm2\mathrm{Result}=3.333333\ {\rm mm}^2

Interpretation. Routing and macros can require a different practical footprint.

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Example 15. Square core dimension

Definitions & inputs. Core area 4 mm².

  1. Choose the governing model and isolate the requested quantity.

    ℓ=A\ell=\sqrt A
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    ℓ=4\ell=\sqrt4
  3. Evaluate the expression; the result uses the units shown.

    Result=2 mm\mathrm{Result}=2\ {\rm mm}

Interpretation. Aspect ratio changes dimensions at fixed area.

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Example 16. Poisson defect yield

Definitions & inputs. D0=0.1 defects/cm², die area A=1 cm².

  1. Choose the governing model and isolate the requested quantity.

    Y=e−D0AY=e^{-D_0A}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Y=e−0.1Y=e^{-0.1}
  3. Evaluate the expression; the result uses the units shown.

    Result=0.9048374 \mathrm{Result}=0.9048374\

Interpretation. This predicts random-area defect-free yield only.

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Example 17. Expected good dies

Definitions & inputs. Gross dies=500, yield=0.9.

  1. Choose the governing model and isolate the requested quantity.

    Ngood=YNgrossN_{good}=YN_{gross}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Ngood=0.9(500)N_{good}=0.9(500)
  3. Evaluate the expression; the result uses the units shown.

    Result=450 \mathrm{Result}=450\

Interpretation. Expected count is not a guaranteed lot outcome.

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Example 18. Junction temperature

Definitions & inputs. Ta=25°C, θJA=20 K/W, P=2 W.

  1. Choose the governing model and isolate the requested quantity.

    Tj=Ta+θJAPT_j=T_a+\theta_{JA}P
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    Tj=25+20(2)T_j=25+20(2)
  3. Evaluate the expression; the result uses the units shown.

    Result=65 ∘C\mathrm{Result}=65\ {}^\circ{\rm C}

Interpretation. Package and board conditions determine θJA.

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Example 19. Amdahl speedup

Definitions & inputs. Fraction accelerated f=0.8, that block becomes 4× faster.

  1. Choose the governing model and isolate the requested quantity.

    S=[(1−f)+f/s]−1S=[(1-f)+f/s]^{-1}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    S=[0.2+0.8/4]−1S=[0.2+0.8/4]^{-1}
  3. Evaluate the expression; the result uses the units shown.

    Result=2.5 \mathrm{Result}=2.5\

Interpretation. Speeding one block does not multiply whole-system speed by four.

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Example 20. Pipeline throughput

Definitions & inputs. One result each clock at f=500 MHz after filling.

  1. Choose the governing model and isolate the requested quantity.

    R=f/IIR=f/\mathrm{II}
  2. Insert the stated inputs in consistent units or the explicitly defined normalized units.

    R=5×108/1R=5\times10^8/1
  3. Evaluate the expression; the result uses the units shown.

    Result=5×108 results s−1\mathrm{Result}=5\times10^{8}\ {\rm results\,s}^{-1}

Interpretation. Latency can still be many cycles; initiation interval is one.

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Symbols and units

Each derivation and problem defines its own symbols and inputs. Symbols may be reused with different meanings in other subjects. Keep units consistent, retain sufficient precision during calculation, and apply the stated validity limits.